ABDULLAH AL BAKI
Dhaka, Bangladesh | abdullah-al-baki@iut-dhaka.edu
CAREER OBJECTIVE
Deeply motivated to pursue a career in academia and contribute to the advancement of knowledge through meaningful research. Passionate about solving real-world problems by combining curiosity, critical thinking, and continuous learning.
ACADEMIC CREDENTIALS
Islamic University of Technology — Jun 2024
B.Sc. (Engg.) in Electrical & Electronic Engineering
CGPA: 3.92/4.00
Relevant Courses:
Semiconductor Devices, Digital Logic Design, Electronics I & II, Power Electronics, Biomedical Signal Processing, Electrical Circuit I & II, Control System.
Undergraduate Thesis
Title: Machine Learning Based Residential Load Forecasting & Dynamic Demand Side Management
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Utilized LSTM neural networks to forecast residential power demand using historical load and weather data through univariate and multivariate analysis.
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Applied Demand Side Management (DSM) techniques to optimize energy consumption. Demonstrated how Machine Learning can enhance DSM for smarter, more sustainable energy management.
Thesis Supervisor: Md. Arif Hossain
PUBLICATION
A. Al Baki, A. A. Afridi, M. A. Hasnat and C. K. Roy, “An Ultra Low Power, 5nA Multi-Input Pseudo-Differential Bulk-Driven OTA With 92.97° Phase Margin for Biosignal Acquisition,” 2025 International Conference on Quantum Photonics, Artificial Intelligence, and Networking (QPAIN), Rangpur, Bangladesh, 2025, pp. 1–7.
DOI: 10.1109/QPAIN66474.2025.11171863.
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Designed a multi-input OTA in 90nm CMOS at 0.5V with 5nA bias currents, achieving 11 nW power consumption.
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Achieved input common-mode range of 100–220 mV, DC gain 15.44 dB, gain margin 25 dB, phase margin 92.97°.
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Used bulk-driven input stage and self-cascode output structure for high output resistance and symmetric behavior.
“A 2.55 ppm/°C High-Accuracy Bandgap Reference in 90-nm CMOS With Compact Area and Enhanced PSRR,” 2025 International Conference on Computer and Information Technology (ICCIT) (Accepted).
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Proposed a voltage-mode bandgap reference in 90-nm CMOS for precision mixed-signal applications.
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Achieved ppm-level temperature coefficient and enhanced PSRR across process and environmental variations.
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Realized a compact layout optimized for SoC integration.
PROFESSIONAL EXPERIENCE
SILICONOVA — Dec 2024 – Present
Analog & Mixed-Signal Design Engineer I
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Skilled in designing and simulating analog circuits at transistor level based on given specifications.
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Experience with Cadence Virtuoso for schematic entry and Spectre for DC, AC, transient, and stability analyses using ADE Assembler/Explorer.
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Familiar with analog layout design using Virtuoso Layout L and Layout XL, including planning and matching techniques.
TECHNICAL PROJECTS
Bandgap Reference with Bowl-Shape Curvature Compensator | 45nm (Cadence)
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Output voltage: 0.6V at 1.2V supply.
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Curvature-compensated variation: 0.233 mV across −40°C to +125°C.
Operational Amplifier Design | 90nm (Cadence)
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2.5V supply, Gain 70 dB, Slew Rate 4.8 V/µs, ICMR 1.25–2V, GBP 143.2 MHz.
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Performed DC, AC, transient, XF, and stability analysis.
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Prepared industry-standard data sheet.
3-bit SAR ADC Design | 90nm (Cadence)
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Implemented sample-and-hold, comparator, DAC, and SAR logic.
4×4 Array Multiplier | 45nm (Cadence)
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Designed static CMOS multiplier generating 8-bit output.
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Implemented AND gates, full adders, DFFs, control logic, and clock tree.
Power System PCB Design for Mars Rover Motors | Eagle
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Designed PCB for power measurement of NEMA 11/23 stepper motors, servo motors, BLDC motors, and wiper motors (ERC-2021).
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Integrated sensors, Arduino Mega, 20×4 display, and LEDs.
PLC Project – Traffic Light Sequence Control | XG5000
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Designed PLC ladder logic for automatic traffic light control with vehicle flow and pedestrian overrides.
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Included left-turn signaling and full reset functionality.
Heart Disease Prediction Using Machine Learning
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Achieved >83% accuracy on UCI Heart Failure dataset.
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Validated using cross-validation, F1-score, ROC-AUC.
SKILLS & ABILITIES
Analog & Mixed-Signal IC Design:
Cadence Virtuoso, Spectre, ADE Assembler & Explorer
Layout Tools:
Virtuoso Layout L, Layout XL
Programming & ML:
C, MATLAB, Python (Pandas, NumPy, Matplotlib, Scikit-learn, TensorFlow)
Other Tools:
Autodesk Eagle, AutoCAD, Proteus, LaTeX, MS Office
EXTRACURRICULAR EXPERIENCE
ESONANCE 2023 | Organizer (Head of Robotics)
Sep 2023 – Oct 2023
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Led logistics, budgeting, coordination for 300 participants and 70 teams.
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Ensured smooth event operations and communication across teams.
IUT EEE Cricket Team | Captain (2023)
IUT Mars Rover – Team Avijatrik | Senior Electrical Member
Feb 2021 – Aug 2022
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Designed electrical and power systems for rover competitions.
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Competed in ERC 2022 and IRDC 2021.
ERC-2022: 18th (On-Site), 11th (Remote)
IRDC-2021: 11th Global Ranking
REFERENCES
Professor Dr. Md. Ashraful Haque
Vice-Chancellor, Ahsanullah University of Science and Technology
Ex-Professor (EEE), Islamic University of Technology
Email: mahoque@iut-dhaka.edu
Mobile: +88 01735444474
Professor Dr. Rakibul Hasan Sagor
Professor, Dept. of Electrical & Electronic Engineering
Islamic University of Technology
Email: sagor@iut-dhaka.edu
